This standard describes the underlying physics and the operation of floating gate memory arrays, specifically, UV erasable EPROM, byte rewritable E2PROMs, and block rewritable flash EEPROMs. In addition, reliability hazards are covered with focus on retention, endurance, and disturb. There are also clauses on the issues of testing floating gate arrays and their hardness to ionizing radiation.
Abstract
New IEEE Standard - Superseded.An introduction to the physics unique to this type of memory and an overview of typicalarray architectures are presented. The variations on the basic floating gate nonvolatile cellstructure that have been used in commercially available devices are described. The variousreliability considerations involved in these devices are explored. Retention and endurancefailures and the interaction between endurance, retention, and standard semiconductor failuremechanisms in determining the device failure rate are covered. How to specify and performengineering verification of retention of data stored in the arrays is described. Effects that limit theendurance of the arrays are discussed. The specification and engineering verification ofendurance are described. The more common features incorporated into the arrays and methodsfor testing these complex products efficiently are addressed. The effects that various forms ofionizing radiation may have on floating gate arrays and approaches to test for these effects arecovered. The use of floating gate cells in nonmemory applications is briefly considered.
Product Details
Published: 10/17/1991 ISBN(s): 9781559371360 Number of Pages: 0File Size: 1 file , 3.3 MB Product Code(s): STDSU14464
