This standard provides specifications for applying 8-bit microprocessors to a low-cost modular busing scheme. The signals for this bus are generally derived directly from the processor device and are buffered but not retimed. This scheme results in some modules being processor-device dependent. The body of this standard provides a core specification for the device-independent parameters. Appendixes provide device-dependent parameters for various processors.
Abstract
New IEEE Standard - Inactive-Withdrawn.Withdrawn Standard. Withdrawn Date: Jan 15, 2001. No longer endorsed by the IEEE. An 8-bit microcomputer bus system derived from the industry bus known as the STD bus is described. The STD bus is a modular packaging and interconnect scheme for 8-bit microprocessor card systems. The bus size and bus organization were selected to serve the interface between any 8-bit microprocessor and a variety of memory and I/O functions. Logical, timing, electrical, and mechanical specifications are provided. The body of the standard provides a core specification for the device-independent parameters. Appendixes provide device-dependent parameters for various processors. This document also contains ANSI/IEEE Std 1101-1987, IEEE Standard for Mechanical Core Specifications for Microcomputers.
Product Details
Published: 06/30/1988 ISBN(s): 1559376694, 9780738127552 Number of Pages: 61File Size: 1 file , 610 KB Product Code(s): STDWD12021