This standard defines test logic that can be included in an integrated circuit to provide standardized approaches to-- testing the interconnections between integrated circuits once they have been assembled onto aprinted circuit board or other substrate;-- testing the integrated circuit itself; and-- observing or modifying circuit activity during the component's normal operation. The test logic consists of a boundary-scan register and other building blocks and is accessed through a Test Access Port (TAP).
Purpose
As technology has changed, the original 1149.1 standard does not address the new needs of the end users. The purpose of this PAR is to address these new needs in the IEEE 1149.1 standard. The intended users are silicon vendors, silicon designers, board and system electronic manufacturers and test equiment manufacturers. The benefits are additional capabilities and ease-of-use of 1149.1 for the current technology of mix-signal devices, differential logic and programmable devices.
Abstract
Revision Standard - Superseded.Circuitry that may be built into an integrated circuit to assist in the test, maintenance, and support of assembled printed circuit boards is defined. The circuitry includes a standard interface through which instructions and test data are communicated. A set of test features is defined, including a boundary-scan register, such that the component is able to respond to a minimum set of instructions designed to assist with testing of assembled printed circuit boards.
Product Details
Published: 07/23/2001 ISBN(s): 0738129445, 9780738129457 Number of Pages: 208File Size: 1 file , 1.3 MB Product Code(s): STDSU94949
